Grid Synchronization of converter using an Improved SOGI-PLL Technique

Paper title: CORDIC-based Orthogonal Signal Generation with In-loop Moving Average Filter for Single Phase PLL Systems.

Authors' names and affiliation: Satyanarayana Muddasani, Ph.D. Scholar, Indian Institute of Technology Ropar and A.V. Ravi Teja, Assistant Professor, Indian Institute of Technology Ropar.

Paper abstract:
In this paper, an Orthogonal Signal Generation (OSG) using the CORDIC algorithm is proposed for Phase-Locked Loop (PLL) in single-phase systems. The proposed technique is to overcome the issues of Second Order Generalized Integrator-PLL (SOGI-PLL) in estimating frequency and phase during abnormal conditions (dc offset, harmonics, voltage sag, and frequency drift)
of the grid. The OSG using CORDIC algorithm along With a Moving Average based band rejection Filter (WMAF) as an in-loop filter is used to attenuate the harmonic frequency components present in the quadrature axis component (Vq) of PLL during abnormal conditions of the grid. To test the effectiveness of the proposed algorithm, the grid voltage input (Vg) with
several critical distortions are considered, and a comprehensive analysis of the results for the SOGI-PLL, SOGI-PLL-WMAF, and Proposed PLL are presented. These results are simulated using MATLAB/SIMULINK and validated using an experimental setup designed in the laboratory. The frequency estimate and phase are obtained accurately using the proposed algorithm under the normal and abnormal conditions of the grid.